The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2012

Filed:

Dec. 10, 2009
Applicants:

Kin Yee Wong, Ottawa, CA;

Peter Roberts, Stittsville, CA;

Inventors:

Kin Yee Wong, Ottawa, CA;

Peter Roberts, Stittsville, CA;

Assignee:

Alcatel Lucent, Paris, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention is directed to a method and system for providing synchronization clock performance simulation in a timing-over-packet network having a network management system. The system retrieves information from nodes in a network and determines a timing-over-packet topology in a simulated model of the network, and determines clock stability statistics. The system further accepts simulation inputs such as addition or deletion of nodes in the simulated network, or introduction of failures into in the simulated network. The system provides predicted clock stability performance of an existing network under various simulated conditions without requiring modifications or introduction of failures to the existing network which would be useful for network optimization and network planning.


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