The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2012

Filed:

Nov. 09, 2009
Applicants:

Vikas Chandra, Fremont, CA (US);

Satyanand Vijay Nalam, Charlottesville, VA (US);

Cezary Pietrzyk, Los Gatos, CA (US);

Robert Campbell Aitken, San Jose, CA (US);

Inventors:

Vikas Chandra, Fremont, CA (US);

Satyanand Vijay Nalam, Charlottesville, VA (US);

Cezary Pietrzyk, Los Gatos, CA (US);

Robert Campbell Aitken, San Jose, CA (US);

Assignee:

ARM Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A static random access memory (SRAM) includes a data line for transferring data to and from the memory and at least one reset line, a plurality of storage cells, each cell including an asymmetric feedback loop; an access device for selectively providing a connection between the at data line and the cell's first access node; a reset device for selectively providing a connection between a reset line and the cell's second access node. The SRAM further includes data access control circuitry for generating control signals for independently controlling the access device and the reset device and to generate a data access control signal. The SRAM also generates a reset control signal to trigger the reset device to provide the connection between the at least one reset line and the second access node in response to a write request to write the complementary predetermined value to the storage cell.


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