Flash memory device, programming and reading methods performed in the same

Abstract

The flash memory device includes a control logic circuit and a bit level conversion logic circuit. The control logic circuit programs first through Nbits of data in a memory cell array of the N-bit MLC flash memory device or reads the first through Nbits of the data from the memory cell array in response to one of a program command and a read command. The bit level conversion control logic circuit, after the first through Nbits of the data are completely programmed or read, programs or reads an (N+1)bit of the data in response to a control signal. The bit level conversion control logic circuit converts voltage levels of voltages, which are used for programming or reading the first through Nbits of the data, to program or read for 2cell distributions of 2cell distributions corresponding to the (N+1)bit of the data and then programs or reads for other 2cell distributions.