The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2012

Filed:

Oct. 19, 2010
Applicants:

Kenichi Mori, Kanagawa, JP;

Tetsushi Satou, Kanagawa, JP;

Koji Shigemura, Kanagawa, JP;

Setsuo Kaneko, Kanagawa, JP;

Inventors:

Kenichi Mori, Kanagawa, JP;

Tetsushi Satou, Kanagawa, JP;

Koji Shigemura, Kanagawa, JP;

Setsuo Kaneko, Kanagawa, JP;

Assignee:

NLT Technologies, Ltd., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1335 (2006.01); G02F 1/133 (2006.01); G02F 1/1347 (2006.01); C09K 19/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

To provide an erasing device whose power consumption required for erasing operations is suppressed, which does not spoil the portability of an optical writing type display medium. In a first display function layer, voltages applied to two cholesteric liquid crystal layers when an erasing voltage is applied between a pair of electrodes are defined as V, V, respectively, and threshold voltages with which the cholesteric liquid crystal layers change to the homeotropic alignment are defined as Vth, Vth, respectively. In that case, in a state the voltages Vand Vare determined according to only each resistance of the cholesteric liquid crystal layers and resistance of a photoconductive layer, i.e., a sufficient time has passed from a point at which the erasing voltage is applied, V≧Vthand V≧Vthapply.


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