The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2012

Filed:

Oct. 12, 2010
Applicants:

Marios C. Papaefthymiou, Ann Arbor, MI (US);

Alexander Ishii, Princeton, NJ (US);

Inventors:

Marios C. Papaefthymiou, Ann Arbor, MI (US);

Alexander Ishii, Princeton, NJ (US);

Assignee:

Cyclos Semiconductor, Inc., Berkeley, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/12 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An inductor architecture for resonant clock distribution networks is described. This architecture allows for the adjustment of the natural frequency of a resonant clock distribution network, so that it achieves energy-efficient operation at multiple clock frequencies. The proposed architecture exhibits no inductor overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels.


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