The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2012
Filed:
Nov. 17, 2009
Applicant:
Hideaki Yamada, Shimosuwa, JP;
Inventor:
Hideaki Yamada, Shimosuwa, JP;
Assignee:
Seiko Epson Corporation, , JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A clock generating device includes: a DDS circuit that generates a periodic signal; and a comparator that compares an input signal and a reference signal and outputs a binary signal. The clock generating device includes a rate-of-change correcting unit that applies correction for increasing a rate of change at a crossing point with the reference signal to the periodic signal generated by the DDS circuit.
Yamada, Hideaki. (2012). Clock generating device and jitter reducing method in the clock generating device (U.S. Patent No. 8339160). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8339160
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile