The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8338221 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 25, 2012

Filed:

Dec. 01, 2009
Applicants:

Chang Ho Lee, Gyeonggi-do, KR;

Hyung Dong Kang, Gyeonggi-do, KR;

Hyun Ho Lee, Gyeonggi-do, KR;

Yong Hyun Lee, Gyeonggi-do, KR;

Seon Myung Kim, Gyeonggi-do, KR;

Inventors:

Chang Ho Lee, Gyeonggi-do, KR;

Hyung Dong Kang, Gyeonggi-do, KR;

Hyun Ho Lee, Gyeonggi-do, KR;

Yong Hyun Lee, Gyeonggi-do, KR;

Seon Myung Kim, Gyeonggi-do, KR;

Assignee:

Jusung Engineering Co., Ltd., Gwangju-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 29/04 (2006.01); H01L 29/10 (2006.01); H01L 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a thin film type solar cell is disclosed, which is capable of reducing degradation of solar cell by decreasing the number of dangling bonding sites or SiHbonding sites existing in amorphous silicon owing to an optimal content ratio of ingredient gases, an optimal chamber pressure, or an optimal substrate temperature during a process for depositing an I-type semiconductor layer of amorphous silicon by a plasma CVD method, the method comprising forming a front electrode layer on a substrate; sequentially depositing P-type, I-type, and N-type semiconductor layers on the front electrode layer; and forming a rear electrode layer on the N-type semiconductor layer, wherein the process for forming the I-type semiconductor layer comprises forming an amorphous silicon layer by the plasma CVD method under such circumstances that at least one of the aforementioned conditions is satisfied, for example, a content ratio of silicon-containing gas to hydrogen-containing gas is within a range between 1:7 and 1:10; a chamber pressure is maintained at a range between 2.0 Torr and 2.4 Torr; and a substrate temperature is maintained at a range between 225° C. and 250° C.


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