The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2012
Filed:
Apr. 22, 2009
Robert T. Golla, Round Rock, TX (US);
Jama I. Barreh, Austin, TX (US);
Jeffrey S. Brooks, Austin, TX (US);
Howard L. Levy, Cedar Park, TX (US);
Robert T. Golla, Round Rock, TX (US);
Jama I. Barreh, Austin, TX (US);
Jeffrey S. Brooks, Austin, TX (US);
Howard L. Levy, Cedar Park, TX (US);
Oracle America, Inc., Redwood City, CA (US);
Abstract
Techniques and structures are described which allow the detection of certain dependency conditions, including evil twin conditions, during the execution of computer instructions. Information used to detect dependencies may be stored in a logical map table, which may include a content-addressable memory. The logical map table may maintain a logical register to physical register mapping, including entries dedicated to physical registers available as rename registers. In one embodiment, each entry in the logical map table includes a first value usable to indicate whether only a portion of the physical register is valid and whether the physical register includes the most recent update to the logical register being renamed. Use of this first value may allow precise detection of dependency conditions, including evil twin conditions, upon an instruction reading from at least two portions of a logical register having an entry in the logical map table whose first value is set.