The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2012
Filed:
Jul. 10, 2009
Mehrdad Hamadani, San Jose, CA (US);
Deepak Bansal, San Jose, CA (US);
Sam Htin Moy, Daly City, CA (US);
Sreenivasulu Malli, Fremont, CA (US);
David Cheung, Cupertino, CA (US);
Mani Kancherla, Milpitas, CA (US);
Sridhar Devarapalli, Santa Clara, CA (US);
Mehrdad Hamadani, San Jose, CA (US);
Deepak Bansal, San Jose, CA (US);
Sam Htin Moy, Daly City, CA (US);
Sreenivasulu Malli, Fremont, CA (US);
David Cheung, Cupertino, CA (US);
Mani Kancherla, Milpitas, CA (US);
Sridhar Devarapalli, Santa Clara, CA (US);
Brocade Communications Systems, Inc., San Jose, CA (US);
Abstract
A multi-processor architecture for a network device that includes a plurality of barrel cards, each including: a plurality of processors, a PCIe switch coupled to each of the plurality of processors, and packet processing logic coupled to the PCIe switch. The PCIe switch on each barrel card provides high speed flexible data paths for the transmission of incoming/outgoing packets to/from the processors on the barrel card. An external PCIe switch is commonly coupled to the PCIe switches on the barrel cards, as well as to a management processor, thereby providing high speed connections between processors on separate barrel cards, and between the management processor and the processors on the barrel cards.