The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2012
Filed:
Nov. 12, 2003
Shridhar Mukund, San Jose, CA (US);
Jinesh Parikh, Milpitas, CA (US);
Shridhar Mukund, San Jose, CA (US);
Jinesh Parikh, Milpitas, CA (US);
PMC-Sierra US, Inc., Santa Clara, CA (US);
Abstract
A method for simulating a chip is provided. The method initiates with defining a library of components for a processor. Then, the interconnections for a set of pipelined processors including the processor are defined. Next, a processor circuit is generated by combining the library of components and the interconnections for the set of pipelined processors. Then, a code representation of a model of the set of pipelined processors is generated. Next, the signals generated by the code representation are compared to the signals generated by the processor circuit. If the comparison of the signals is unacceptable, then the method includes identifying a cause of the unacceptable comparison of the signals at a block level of the processor circuit. A method for generating a netlist for a pipeline of processors, a method for debugging the processor circuit and computer code for simulating a chip circuit are also provided.