Fuse circuit of semiconductor apparatus

Abstract

Various embodiments of a fuse circuit of a semiconductor apparatus are disclosed. In one exemplary embodiment, the fuse circuit may include a fuse whose electrical connection state can be changed by an electrical stress applied thereto and a plurality of self boosting units configured to perform self boosting operations under the control of a rupture enable signal. The self boosting units may also be configured to generate stress voltages and supply the generated stress voltages to the fuse. The fuse circuit may also include a precharge unit configured to supply a precharge voltage to the fuse in response to a precharge signal and a cross-coupled latching amplification unit configured to sense a change in a voltage level of the precharge voltage supplied to the fuse, with reference to a reference voltage, and output a fuse state signal.