The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2012

Filed:

Jun. 09, 2008
Applicants:

Tetsuo Furumiya, Kyoto, JP;

Junichi Ohi, Muko, JP;

Inventors:

Tetsuo Furumiya, Kyoto, JP;

Junichi Ohi, Muko, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

The limiter circuit of this invention is a limiter circuit which, by switching action of a pair of transistors, allows passage of only signal voltage components of an input signal voltage included in ranges of an upper limit signal voltage and a lower limit signal voltage. With this construction, the pair of transistors carry out comparisons between the input signal voltage and threshold signal voltages and line switching at the same time. Therefore, there is no influence of propagation delay speed, and no switching noise occurs at times of line switching. Since diodes are not used, a high-speed limiter circuit can be manufactured.


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