The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2012

Filed:

Jan. 18, 2011
Applicants:

Andrea Mario Veggetti, Agrate Brianza, IT;

Abhishek Jain, Delhi, IN;

Pankaj Rohilla, New Delhi, IN;

Inventors:

Andrea Mario Veggetti, Agrate Brianza, IT;

Abhishek Jain, Delhi, IN;

Pankaj Rohilla, New Delhi, IN;

Assignees:

STMicroelectronics S.r.l., Agrate Brianza, IT;

STMicroelectronics PVT Ltd, Greater Noida, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); H03K 3/289 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present disclosure relates to a low consumption flip-flop circuit with data retention, comprising at least one flip-flop and at least one retention cell connected to the output of the flip-flop and configured so that during normal operation of the flip-flop circuit, the retention cell transmits the data or logic state present on the output terminal of the flip-flop to its own output terminal, while during low consumption operation of the flip-flop circuit a latch circuit of the retention cell suitable to memorize data or a logic state corresponding to the last data or logic state present on the output terminal of the flip-flop is activated.


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