The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2012

Filed:

Jan. 22, 2004
Applicants:

Jorn Nystad, Trondheim, NO;

Edvard Sorgard, Trondheim, NO;

Borgar Ljosland, Trondheim, NO;

Mario Blazevic, Lena, NO;

Inventors:

Jorn Nystad, Trondheim, NO;

Edvard Sorgard, Trondheim, NO;

Borgar Ljosland, Trondheim, NO;

Mario Blazevic, Lena, NO;

Assignee:

Arm Norway AS, Trondheim, NO;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 9/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A slave device () communicates with a host system () via a host communications bus (). The host system () includes one (or more) processing units that can act as bus masters and send access requests for slave resources on the slave device () via the communications bus (). The slave device platform () includes a memory management unit (), a programmable central processing unit () and one or more slave resources (). The memory management unit () acts as an address translating device, and accepts requests with virtual addresses from the master device or devices on the host system (), translates the virtual addresses used in the access requests to the 'internal' physical addresses of the slave's resources and forwards the accesses of the appropriate physical resources (). When an address miss occurs in the memory management unit (), it passes the handling of the access request over to the controlling CPU () which executes software to then resolve the address miss and handle the access request. The memory management unit () also includes a write buffer () into which it can write the write value received from a master on the host system () on an access when an address miss occurs, and a read buffer () for storing values relating to read requests that have generated an address miss.


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