The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2012
Filed:
Sep. 11, 2007
Abdel-fattah S. Yousif, Calgary, CA;
James W. Haslett, Calgary, CA;
Abdel-Fattah S. Yousif, Calgary, CA;
James W. Haslett, Calgary, CA;
Other;
Abstract
A Time-to-Digital Converter (TDC) is constructed using simple digital delay circuits. The design uses a clock compensation scheme to modify and adjust the TDC's operation under integrated circuit fabrication process variations. The TDC design is based on a novel digital processing algorithm that produces one conversion every clock cycle. Therefore, this TDC is the 'first' single cycle latency TDC targeted at high speed circuit applications such as (but not limited to) time-based Analog to Digital Converters (ADCs) for direct analog to digital conversion of radio frequency signals in wireless communication systems and high speed signal measurement applications. Due to its hierarchical design approach, the TDC design uses an optimized number of delay circuits and therefore requires very little power consumption and silicon area.