The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2012

Filed:

Dec. 18, 2009
Applicants:

Tae-han Kim, Gyeonggi-do, KR;

Dong-hyun Kim, Gyeonggi-do, KR;

Inventors:

Tae-Han Kim, Gyeonggi-do, KR;

Dong-Hyun Kim, Gyeonggi-do, KR;

Assignee:

Hynix Semiconductor, Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01); H01L 21/461 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, sequentially forming a silicon layer and a metal layer over the gate insulation layer, performing a first gate etching process to etch the metal layer using a gate hard mask layer, formed on the metal layer, as an etch barrier, and then partially etch the silicon layer, thereby forming a first pattern, performing a second gate etching process to partially etch the silicon layer, thereby forming an undercut beneath the metal layer, forming a capping layer on both sidewalls of the first pattern including the undercut, performing a third gate etching process to etch the silicon layer to expose the gate insulation layer using the gate hard mask layer and the capping layer as an etch barrier, thereby forming a second pattern, and performing a gate re-oxidation process.


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