The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2012
Filed:
May. 21, 2009
George C. Tang, Cupertino, CA (US);
Lizhi Zhong, Sunnyvale, CA (US);
Freeman Y. Zhong, San Ramon, CA (US);
Wenyi Jin, Santa Clara, CA (US);
Jeffrey A. Hall, San Jose, CA (US);
George C. Tang, Cupertino, CA (US);
Lizhi Zhong, Sunnyvale, CA (US);
Freeman Y. Zhong, San Ramon, CA (US);
Wenyi Jin, Santa Clara, CA (US);
Jeffrey A. Hall, San Jose, CA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A method of minimizing crosstalk in an IC package including (A) routing a first signal between first pads and a first trace layer in an congested area, (B) routing the first signal between the first and second trace layers in an non-congested area, (C) routing the first signal between the second trace layer and first pins in the non-congested area, (D) routing a second signal between second pads and the first trace layer in the congested area, (E) routing the second signal between the first and the second trace layers in the congested area and (F) routing the second signal between the second trace layer and second pins in the non-congested area, wherein (i) all of the first and second pins are arranged along a line and (ii) the first pins are offset from the second pins by a gap of at least two inter-pin spaces.