The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2012
Filed:
Apr. 11, 2011
Steven C. Miller, Livermore, CA (US);
Martin M. Deneroff, Oakhurst, NJ (US);
Curt F. Schimmel, San Ramon, CA (US);
Larry Rudolph, Brookline, MA (US);
Charles E. Leiserson, Cambridge, MA (US);
Bradley C. Kuszmaul, Lexington, MA (US);
Krste Asanovic, Cambridge, MA (US);
Steven C. Miller, Livermore, CA (US);
Martin M. Deneroff, Oakhurst, NJ (US);
Curt F. Schimmel, San Ramon, CA (US);
Larry Rudolph, Brookline, MA (US);
Charles E. Leiserson, Cambridge, MA (US);
Bradley C. Kuszmaul, Lexington, MA (US);
Krste Asanovic, Cambridge, MA (US);
Silicon Graphics International Corp., Fremont, CA (US);
Abstract
A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.