The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2012

Filed:

Apr. 20, 2007
Applicants:

Keith D. Richeson, Cary, NC (US);

David UY, Raleigh, NC (US);

Andrew J. Borleske, Garner, NC (US);

Brent R. Brian, Clayton, NC (US);

Robert T. Mason, Jr., Raleigh, NC (US);

Rodney C. Hemminger, Raleigh, NC (US);

Russell G. Christopher, Clayton, NC (US);

Raymond Kelley, Raleigh, NC (US);

Inventors:

Keith D. Richeson, Cary, NC (US);

David Uy, Raleigh, NC (US);

Andrew J. Borleske, Garner, NC (US);

Brent R. Brian, Clayton, NC (US);

Robert T. Mason, Jr., Raleigh, NC (US);

Rodney C. Hemminger, Raleigh, NC (US);

Russell G. Christopher, Clayton, NC (US);

Raymond Kelley, Raleigh, NC (US);

Assignee:

Elster Electricity, LLC, Raleigh, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 4/00 (2009.01);
U.S. Cl.
CPC ...
Abstract

Techniques for over the air (OTA) microcontroller flash memory updates using a wireless network are disclosed herein. A control node first transmits the microcontroller flash memory update to all devices that can receive the message. Each packet of the message is relayed through multiple communication levels until all devices receive the packet. This starts with communications from the control node to each device node that has a direct communication path to the control node, which are referred to herein as 'first level' device nodes. The first level device nodes then relay each communication to each other device node that has a direct communication path to the first level device nodes, which are referred to herein as 'second level' device nodes. This process is repeated at each level of the wireless network until each of the plurality of device nodes has received the microcontroller flash memory update.


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