The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2012
Filed:
May. 27, 2010
Hiroyuki Kutsukake, Yokohama, JP;
Kenji Gomikawa, Yokohama, JP;
Yoshiko Kato, Yokohama, JP;
Mitsuhiro Noguchi, Yokohama, JP;
Masato Endo, Yokohama, JP;
Hiroyuki Kutsukake, Yokohama, JP;
Kenji Gomikawa, Yokohama, JP;
Yoshiko Kato, Yokohama, JP;
Mitsuhiro Noguchi, Yokohama, JP;
Masato Endo, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A semiconductor memory device includes a first transistor. The first transistor includes a gate electrode, a channel region, a source region, a source region, an overlapping region, a contact region, and an impurity diffusion region. The channel region has a first impurity concentration. The source and drain regions have a second impurity concentration. The overlapping region is formed in the semiconductor layer where the channel region overlaps the source region and the drain region, and has a third impurity concentration. The contact region has a fourth impurity concentration. The impurity diffusion region has a fifth impurity concentration higher than the second impurity concentration and lower than the fourth impurity concentration. The impurity diffusion region is in contact with the contact region and away from the overlapping region and positioned at least in a region between the contact region and the overlapping region.