The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2012

Filed:

Oct. 24, 2008
Applicant:

Chia Hao Lee, Shanghai, CN;

Inventor:

Chia Hao Lee, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for forming a MOS device with an ultra shallow lightly doped diffusion region includes providing a gate dielectric layer overlying a substrate surface region, forming a gate structure overlying the gate dielectric layer, performing a first implant process using a germanium species to form an amorphous region within an LDD region using the gate structure as a mask, and performing a second implant process in the LDD region using a P-type impurity and a carbon species. A first thermal process activates the P-type impurity in the LDD region, forming side wall spacers overlying the gate structure, and performing a third implant process using a first impurity to form active source/drain regions in a vicinity of the surface region adjacent to the gate structure using the gate structure and the spacers as a mask. A second thermal process then activates the first impurity in the active source/drain regions.


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