The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2012
Filed:
Jun. 03, 2010
Gilbert Christopher Sih, San Diego, CA (US);
Charles E. Sakamaki, San Diego, CA (US);
DE D. Hsu, San Diego, CA (US);
Jian Wei, San Diego, CA (US);
Richard Higgins, San Diego, CA (US);
Gilbert Christopher Sih, San Diego, CA (US);
Charles E. Sakamaki, San Diego, CA (US);
De D. Hsu, San Diego, CA (US);
Jian Wei, San Diego, CA (US);
Richard Higgins, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A cached memory system that can handle high-rate input data and ensure that an embedded DSP can meet real-time constraints is described. The cached memory system includes a cache memory located close to a processor core, an on-chip memory at the next higher memory level, and an external main memory at the topmost memory level. A cache controller handles paging of instructions and data between the cache memory and the on-chip memory for cache misses. A direct memory exchange (DME) controller handles user-controlled paging between the on-chip memory and the external memory. A user/programmer can arrange to have the instructions and data required by the processor core to be present in the on-chip memory well in advance of when they are actually needed by the processor core.