The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2012
Filed:
Aug. 15, 2007
Tyson J. Bergland, Palo Alto, CA (US);
Craig M. Okruhlica, San Jose, CA (US);
Edward A. Hutchins, Mountain View, CA (US);
Michael J. M. Toksvig, Palo Alto, CA (US);
Justin M. Mahan, Fremont, CA (US);
Tyson J. Bergland, Palo Alto, CA (US);
Craig M. Okruhlica, San Jose, CA (US);
Edward A. Hutchins, Mountain View, CA (US);
Michael J. M. Toksvig, Palo Alto, CA (US);
Justin M. Mahan, Fremont, CA (US);
Nvidia Corporation, Santa Clara, CA (US);
Abstract
An arithmetic logic stage in a graphics processor unit pipeline includes a number of arithmetic logic units (ALUs) and at least one buffer that stores pixel data for a group of pixels. Each clock cycle, the buffer stores one row of a series of rows of pixel data. A deserializer deserializes the rows of pixel data before the pixel data is placed in the buffer. After the buffer accumulates all rows of pixel data for a pixel, then the pixel data for the pixel can be operated on by the ALUs.