The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2012

Filed:

Apr. 06, 2011
Applicants:

Masami Koketsu, Tokyo, JP;

Toshiaki Sawada, Nanae, JP;

Inventors:

Masami Koketsu, Tokyo, JP;

Toshiaki Sawada, Nanae, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
Abstract

To provide a technique capable of positioning of a semiconductor chip and a mounting substrate with high precision by improving visibility of an alignment mark. In a semiconductor chip constituting an LCD driver, a mark is formed in an alignment mark formation region over a semiconductor substrate. The mark is formed in the same layer as that of an uppermost layer wiring (third layer wiring) in an integrated circuit formation region. Then, in the lower layer of the mark and a background region surrounding the mark, patterns are formed. At this time, the pattern Pis formed in the same layer as that of a second layer wiring and the pattern Pis formed in the same layer as that of a first layer wiring. Further, the pattern Pis formed in the same layer as that of a gate electrode, and the pattern Pis formed in the same layer as that of an element isolation region.


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