The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2012

Filed:

Mar. 28, 2011
Applicants:

Olivier Thomas, Revel, FR;

Claire Fenouillet-béranger, Saint Martin d'Hères, FR;

Philippe Coronel, Barraux, FR;

Stéphane Denorme, Crolles, FR;

Inventors:

Olivier Thomas, Revel, FR;

Claire Fenouillet-Béranger, Saint Martin d'Hères, FR;

Philippe Coronel, Barraux, FR;

Stéphane Denorme, Crolles, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

The memory cell is of SRAM type with four transistors provided with a counter-electrode. It comprises a first area made from semiconductor material with a first transfer transistor and a first driver transistor connected in series, their common terminal defining a first electric node. A second transfer transistor and a second driver transistor are connected in series on a second area made from semiconductor material and their common terminal defines a second electric node. The support substrate comprises first and second counter-electrodes. The first and second counter-electrodes are located respectively facing the first and second semiconductor material areas. The first transfer transistor and second driver transistor are on a first side of a plane passing through the first and second electric nodes whereas the first driver transistor and second transfer transistor are on the other side of the plane.


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