The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2012
Filed:
Aug. 26, 2011
Applicants:
Wlodek Kurjanowicz, Arnprior, CA;
Steven Smith, Wakefield, CA;
Inventors:
Wlodek Kurjanowicz, Arnprior, CA;
Steven Smith, Wakefield, CA;
Assignee:
Sidense Corp., Ottawa, Ontario, CA;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/82 (2006.01);
U.S. Cl.
CPC ...
Abstract
An anti-fuse memory cell having a variable thickness gate dielectric. The variable thickness dielectric has a thick portion and a thin portion, where the thin portion has at least one dimension less than a minimum feature size of a process technology. The thin portion can be rectangular in shape or triangular in shape. The anti-fuse transistor can be used in a two-transistor memory cell having an access transistor with a gate dielectric substantially identical in thickness to the thick portion of the variable thickness gate dielectric of the anti-fuse transistor.