The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2012
Filed:
Dec. 12, 2003
Shigeru Tanaka, Settsu, JP;
Takashi Itoh, Otsu, JP;
Masaru Nishinaka, Otsu, JP;
Kanji Shimo-ohsako, Settsu, JP;
Mutsuaki Murakami, Settsu, JP;
Shigeru Tanaka, Settsu, JP;
Takashi Itoh, Otsu, JP;
Masaru Nishinaka, Otsu, JP;
Kanji Shimo-Ohsako, Settsu, JP;
Mutsuaki Murakami, Settsu, JP;
Kaneka Corporation, Osaka-shi, Osaka, JP;
Abstract
The present invention provides a laminate having a two-layer or three-layer structure including a non-thermoplastic polyimide film and a thermoplastic polyimide layer provided on one or both of the surfaces thereof, the surface of the thermoplastic polyimide layer being surface-treated; a laminate including a polymer film and a layer provided on one or both of the surfaces thereof, the layer including a polyimide resin composition comprising a polyimide resin with a specified structure and a thermosetting component; and a resin film and a laminate including the same which provided one, at least, of surface having a Ra1 value of arithmetic mean roughness of 0.05 μm to 1 μm measured with a cutoff value of 0.002 mm, and a Ra1/Ra2 ratio of 0.4 to 1, Ra2 being a value measured with a cutoff value of 0.1 mm. These laminates can provide a printed circuit board with excellent adhesiveness, on which a micro-wiring circuit can be formed.