The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2012

Filed:

Mar. 15, 2010
Applicants:

Takayuki Iwai, Setagaya-ku, JP;

Shuso Fujii, Kawasaki, JP;

Shinji Miyano, Yokohama, JP;

Inventors:

Takayuki Iwai, Setagaya-ku, JP;

Shuso Fujii, Kawasaki, JP;

Shinji Miyano, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

A sense amplifier circuit senses and amplifies a signal read from memory cells arranged at intersections of word-lines and bit-lines. A write circuit reads first data held in a first memory cell of the memory cells, and writes second data corresponding to the first data in a second memory cell different from the first memory cell. A data latch circuit holds data read from the first memory cell. A logic operation circuit performs a logic operation using data read from the second memory cell and data held in the data latch circuit as input values and outputs third data as an operation value. A write-back circuit writes the third data back to the first memory cell.


Find Patent Forward Citations

Iwai, Takayuki. (2012). Semiconductor memory device (U.S. Patent No. 8310884). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8310884

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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