The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2012
Filed:
Feb. 04, 2009
James K. Schaeffer, Austin, TX (US);
Eric D. Luckowski, Round Rock, TX (US);
James K. Schaeffer, Austin, TX (US);
Eric D. Luckowski, Round Rock, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method and apparatus are described for fabricating single metal gate electrodes () over a high-k gate dielectric layer () that is separately doped in the PMOS and NMOS device areas () by forming first capping oxide layer () with a first dopant species on a high-k gate dielectric layer () in at least the NMOS device area and also forming second capping oxide layer () with a second dopant species on a high-k gate dielectric layer () in at least the PMOS device area, where the first and second dopant species are diffused into the gate dielectric layer () to form a first fixed charge layer () in the PMOS device area of the high-k gate dielectric area and a second fixed charge layer () in the NMOS device area of the high-k gate dielectric area.