The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2012

Filed:

Dec. 07, 2006
Applicants:

Toshiyuki Honda, Kyoto, JP;

Hirokazu SO, Osaka, JP;

Shigekazu Kogita, Osaka, JP;

Masayuki Toyama, Osaka, JP;

Seiji Nakamura, Osaka, JP;

Masato Suto, Osaka, JP;

Manabu Inoue, Osaka, JP;

Inventors:

Toshiyuki Honda, Kyoto, JP;

Hirokazu So, Osaka, JP;

Shigekazu Kogita, Osaka, JP;

Masayuki Toyama, Osaka, JP;

Seiji Nakamura, Osaka, JP;

Masato Suto, Osaka, JP;

Manabu Inoue, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A nonvolatile memory device () includes a plurality of physical blocks, each of which is provide with a nonvolatile memory (), a logic/physical address conversion table, a temporary block and a temporary table. The nonvolatile memory () includes a plurality of pages which are predetermined writing units, respectively. The logical-physical address conversion table () stores correspondence information between logic addresses and physical addresses of data to be stored in the physical blocks. The temporary block is a physical block to store data that are smaller in size than those of the page. The temporary table () stores correspondence information between logic addresses and physical addresses with respect to data to be stored in the temporary block.


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