The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2012

Filed:

Aug. 25, 2011
Applicant:

Junya Ura, Iwata, JP;

Inventor:

Junya Ura, Iwata, JP;

Assignee:

Yamaha Corporation, Hamamatsu-shi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock generation circuit includes a first divider, a loop unit that has a second divider and generates an output clock which is in phase synchronization with a reference clock of the first divider and has a frequency that is F times the reference clock, a clock switching unit that selects one input clock among a plurality of input clocks and supplies the selected input clock to the first divider, and a timing control unit. The timing control unit switches the clock selection command in accordance with switching of clock selection information, switches at least one of a setting of the number R of the input clocks and a setting of the number F of the output clocks, and starts both of a count operation by using the first divider and a count operation by using the second divider after switching of the setting.


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