The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2012

Filed:

Dec. 31, 2008
Applicants:

Yusuke Nakai, Hachioji, JP;

Hironori Furuta, Hachioji, JP;

Mitsuhiko Ogihara, Hachioji, JP;

Hiroyuki Fujiwara, Hachioji, JP;

Inventors:

Yusuke Nakai, Hachioji, JP;

Hironori Furuta, Hachioji, JP;

Mitsuhiko Ogihara, Hachioji, JP;

Hiroyuki Fujiwara, Hachioji, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/02 (2010.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor light emitting apparatus is supplied capable of providing a high performance that can optimize simultaneously both an electrical characteristic and a light emitting characteristic. The semiconductor apparatus comprises an anode layer; a cathode layer that has a conductive type different from that of the anode layer; a gate layer that controls an electrical conduction between the anode layer and the cathode layer; an active layer that is set between the anode layer and the cathode layer and emits light through recombination of electron and positive hole; a first cladding layer that is set on one surface of the active layer and has an energy band gap larger than that of the active layer; and a second cladding layer that is set on other surface of the active layer, has an energy band gap larger than that of the active layer and has a conductive type different from that of the first cladding layer, wherein a thickness of the gate layer is or below a mean free path of carriers implanted into the gate layer.


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