The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2012

Filed:

Aug. 26, 2009
Applicants:

Timothy H. Heil, Rochester, MN (US);

Benjamin Herrenschmidt, Barton, AU;

Jon K. Kriegel, Rochester, MN (US);

Paul Mackerras, Weston ACT, AU;

Andrew H. Wottreng, Brainerd, MN (US);

Inventors:

Timothy H. Heil, Rochester, MN (US);

Benjamin Herrenschmidt, Barton, AU;

Jon K. Kriegel, Rochester, MN (US);

Paul Mackerras, Weston ACT, AU;

Andrew H. Wottreng, Brainerd, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An enhanced mechanism for loading entries into a translation lookaside buffer (TLB) in hardware via indirect TLB entries. In one embodiment, if no direct TLB entry associated with the given virtual address is found in the TLB, the TLB is checked for an indirect TLB entry associated with the given virtual address. Each indirect TLB entry provides the real address of a page table associated with a specified range of virtual addresses and comprises an array of page table entries. If an indirect TLB entry associated with the given virtual address is found in the TLB, a computed address is generated by combining a real address field from the indirect TLB entry and bits from the given virtual address, a page table entry (PTE) is obtained by reading a word from a memory at the computed address, and the PTE is loaded into the TLB as a direct TLB entry.


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