The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2012

Filed:

Oct. 15, 2009
Applicants:

Eli Arbel, Migdal Haemek, IL;

Oleg Rokhlenko, Haifa, IL;

Karen Yorav, Haifa, IL;

Inventors:

Eli Arbel, Migdal Haemek, IL;

Oleg Rokhlenko, Haifa, IL;

Karen Yorav, Haifa, IL;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06N 7/06 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Clock gating circuit is determined by transforming a clock gating opportunity function to a non-Boolean function and constraining inputs of the non-Boolean function. The non-Boolean function may be a ternary function. Constraining the inputs may be achieved by introducing control variables and a cardinality constraint associated with their values. The non-Boolean function may be utilized to approximate universal quantification of an input assigned with a non-Boolean value, such as 'don't care' value. The non-Boolean function may be utilized to provide an ALL SAT solution of a Boolean function using a SAT solver.


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