The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2012
Filed:
May. 28, 2010
Applicants:
Santosh Yachareni, San Jose, CA (US);
Subodh Kumar, San Jose, CA (US);
Hsiao Chen, Campbell, CA (US);
Inventors:
Santosh Yachareni, San Jose, CA (US);
Subodh Kumar, San Jose, CA (US);
Hsiao Chen, Campbell, CA (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A data value is read from one port of a dual-port memory cell during a clock cycle. A WRITE assist pulse having a delay from an end-of-read signal is generated. The delay and duration of the WRITE assist pulse are optionally user-selectable. A high voltage (e.g., Vdd) is coupled to the bitlines (e.g., BL-A, BLc-A) of the first port during the WRITE assist pulse, and a low voltage value (e.g., zero) is written to the memory cell through the second port (e.g., BL-B, BLc-B) during the clock cycle.