The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2012

Filed:

Mar. 08, 2010
Applicants:

David Xuan-qi Wang, Fremont, CA (US);

Mehrdad M. Moslehi, Los Altos, CA (US);

Rafael Ricolcol, Fremont, CA (US);

Joe Kramer, San Jose, CA (US);

Inventors:

David Xuan-Qi Wang, Fremont, CA (US);

Mehrdad M. Moslehi, Los Altos, CA (US);

Rafael Ricolcol, Fremont, CA (US);

Joe Kramer, San Jose, CA (US);

Assignee:

Solexel, Inc., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present disclosure relates to methods for selectively etching a porous semiconductor layer to separate a thin-film semiconductor substrate (TFSS) having planar or three-dimensional features from a corresponding semiconductor template. The method involves forming a conformal sacrificial porous semiconductor layer on a template. Next, a conformal thin film silicon substrate is formed on top of the porous silicon layer. The middle porous silicon layer is then selectively etched to separate the TFSS and semiconductor template. The disclosed advanced etching chemistries and etching methods achieve selective etching with minimal damage to the TFSS and template.


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