The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2012

Filed:

Feb. 12, 2007
Applicants:

Yuguang Wu, Mountain View, CA (US);

Jin Lin, San Jose, CA (US);

Inventors:

Yuguang Wu, Mountain View, CA (US);

Jin Lin, San Jose, CA (US);

Assignee:

Oracle America, Inc., Redwood City, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/00 (2006.01); G06F 9/30 (2006.01); G06F 9/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and method for aggressive loop parallelization using speculative execution is disclosed. The method may include transforming code of a target application for concurrent execution, which may include adding an instruction to create a global address table entry for each store operation on which a load operation of a different loop iteration is dependent. The method may include replacing a standard load instruction with a special instruction configured to determine if an operand address of the load matches an operand address in one of the global address table entries. Another special instruction may remove a table entry following execution of the corresponding store operation. If an operand address of a load of a currently executing thread matches an operand address in the global address table, the method may include setting a checkpoint, completing execution of the thread in a pre-fetch mode, and re-executing the thread from the checkpoint.


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