The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8289041 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 16, 2012

Filed:

Dec. 15, 2008
Applicants:

Kazunori Yamane, Kanagawa, JP;

Takayuki Kurokawa, Kanagawa, JP;

Yuji Tada, Kanagawa, JP;

Hironori Nakamura, Kanagawa, JP;

Manabu Kitabatake, Kanagawa, JP;

Inventors:

Kazunori Yamane, Kanagawa, JP;

Takayuki Kurokawa, Kanagawa, JP;

Yuji Tada, Kanagawa, JP;

Hironori Nakamura, Kanagawa, JP;

Manabu Kitabatake, Kanagawa, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3187 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor integrated circuit device includes a first chip including an internal circuit, and a second chip capable of being accessed only via the first chip, and a test processor circuit electrically connected internally via the first chip, for accessing the second chip from an external terminal and testing the second chip, and a test circuit where an input/output buffer is installed for signals for accessing the second chip within the test processor circuit, and a bypass line installed for transferring signals from the first chip to the second chip and avoiding the input/output buffer within the test processor circuit, and a switch which switches between signal transfer path via the input/output buffer, and a signal transfer path via the bypass line.


Find Patent Forward Citations

Yamane, Kazunori. (2012). Semiconductor integrated circuit device which has first chip and second chip accessed via the first chip and test method thereof (U.S. Patent No. 8289041). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8289041

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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