The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2012

Filed:

Jan. 29, 2010
Applicants:

Atsunobu Suzuki, Osaka, JP;

Koichi Saito, Osaka, JP;

Yasuyuki Yanase, Osaka, JP;

Takahiro Fujii, Osaka, JP;

Inventors:

Atsunobu Suzuki, Osaka, JP;

Koichi Saito, Osaka, JP;

Yasuyuki Yanase, Osaka, JP;

Takahiro Fujii, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor module includes: an insulating resin layer; a wiring layer which is provided on one main surface of the insulating resin layer and which includes an external connection region; bump electrodes which are electrically connected to the wiring layer and each of which is formed such that it protrudes from the wiring layer toward the insulating resin layer; a semiconductor device which is provided on the other main surface of the insulating resin layer and which includes device electrodes connected to the bump electrode; and a wiring protection layer provided on the wiring layer and the insulating resin layer so as to expose the external connection region. In the semiconductor module, the outer edge portion of the wiring protection layer is in contact with the external edge portion of the semiconductor device such that it shields at least a part of the semiconductor resin layer at the side edge.


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