The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2012
Filed:
Mar. 18, 2008
Wataru Saito, Kanagawa-ken, JP;
Syotaro Ono, Kanagawa-ken, JP;
Masakatsu Takashita, Kanagawa-ken, JP;
Yauto Sumi, Hyogo-ken, JP;
Masaru Izumisawa, Hyogo-ken, JP;
Wataru Sekine, Hyogo-ken, JP;
Hiroshi Ohta, Tokyo, JP;
Shoichiro Kurushima, Tokyo, JP;
Wataru Saito, Kanagawa-ken, JP;
Syotaro Ono, Kanagawa-ken, JP;
Masakatsu Takashita, Kanagawa-ken, JP;
Yauto Sumi, Hyogo-ken, JP;
Masaru Izumisawa, Hyogo-ken, JP;
Wataru Sekine, Hyogo-ken, JP;
Hiroshi Ohta, Tokyo, JP;
Shoichiro Kurushima, Tokyo, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A power semiconductor device includes: a first semiconductor layer; a second semiconductor layer and a third semiconductor layer provided in an upper portion of the first semiconductor layer and alternately arranged parallel to an upper surface of the first semiconductor layer; a plurality of fourth semiconductor layers provided on the third semiconductor layer; a fifth semiconductor layer selectively formed in an upper surface of each of the fourth semiconductor layers; a control electrode; a gate insulating film; a first main electrode provided on a lower surface of the first semiconductor layer; and a second main electrode provided on the fourth and the fifth semiconductor layers. Sum of the amount of impurities in the second semiconductor layer and the amount of impurities in the third semiconductor layer at an end on the second main electrode side of the second semiconductor layer and the third semiconductor layer is smaller than the sum at a center of the second semiconductor layer and the third semiconductor layer in the direction from the first main electrode to the second main electrode.