The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2012

Filed:

Nov. 19, 2009
Applicants:

Han Young Yu, Daejeon, KR;

Byung Hoon Kim, Incheon, KR;

Soon Young OH, Daejeon, KR;

Yong Ju Yun, Daejeon, KR;

Yark Yeon Kim, Daejeon, KR;

Won Gi Hong, Seoul, KR;

Inventors:

Han Young Yu, Daejeon, KR;

Byung Hoon Kim, Incheon, KR;

Soon Young Oh, Daejeon, KR;

Yong Ju Yun, Daejeon, KR;

Yark Yeon Kim, Daejeon, KR;

Won Gi Hong, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 35/24 (2006.01); H01L 31/0312 (2006.01); H01L 29/792 (2006.01); H01L 31/0328 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a nanowire memory including a source and a drain corresponding to the source, and a nano channel formed to connect the source to the drain. Here, the nano channel includes a nanowire electrically connecting the source to the drain according to voltages of the source and drain, and a nanodot formed on the nanowire and having a plurality of potentials capturing charges. Thus, the nanowire memory has a simple structure, thereby simplifying a process. It can generate multi current levels by adjusting several energy states using gates, operate as a volatile or non-volatile memory by adjusting the gates and the energy level, and include another gate configured to adjust the energy level, resulting in formation of a hybrid structure of volatile and non-volatile memories.


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