The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2012

Filed:

Apr. 14, 2009
Applicants:

Lakshminarayana Baba Arimilli, Austin, TX (US);

Brian Mitchell Bass, Apex, NC (US);

David Wayne Cummings, Round Rock, TX (US);

Bernard Charles Drerup, Austin, TX (US);

Guy Lynn Guthrie, Austin, TX (US);

Ronald Nick Kalla, Round Rock, TX (US);

Hugh Shen, Round Rock, TX (US);

Michael Steven Siegel, Raleigh, NC (US);

William John Starke, Round Rock, TX (US);

Derek Edward Williams, Austin, TX (US);

Inventors:

Lakshminarayana Baba Arimilli, Austin, TX (US);

Brian Mitchell Bass, Apex, NC (US);

David Wayne Cummings, Round Rock, TX (US);

Bernard Charles Drerup, Austin, TX (US);

Guy Lynn Guthrie, Austin, TX (US);

Ronald Nick Kalla, Round Rock, TX (US);

Hugh Shen, Round Rock, TX (US);

Michael Steven Siegel, Raleigh, NC (US);

William John Starke, Round Rock, TX (US);

Derek Edward Williams, Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 13/36 (2006.01); G06F 13/38 (2006.01); G06F 9/315 (2006.01);
U.S. Cl.
CPC ...
Abstract

A technique for triggering a system bus write command with user code includes identifying a specific store-type instruction in a user instruction sequence. The specific store-type instruction is converted into a specific request-type command, which is configured to include core permission controls (that are stored in core configuration registers of a processor core by a trusted kernel) and user created data (stored in a cache memory). Slave devices are configured through register space (that is only accessible by the trusted kernel) with respective slave permission controls. The specific request-type command is then transmitted from the cache memory, via a system bus. In this case, the slave devices that receive the specific request-type command process the specific request-type command when the core permission controls are the same as the respective slave permission controls. The trusted kernel may be included in a hypervisor or an operating system.


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