The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 02, 2012
Filed:
Jul. 30, 2008
Jan Van Sinderen, Liempde, NL;
Sebastien Amiot, Bieville-Beuville, FR;
Leonardus H. M. Hesen, Hegelsom, NL;
Jan Van Sinderen, Liempde, NL;
Sebastien Amiot, Bieville-Beuville, FR;
Leonardus H. M. Hesen, Hegelsom, NL;
NXP B.V., Eindhoven, NL;
Abstract
A harmonic rejection mixer unit is provided which comprises an input (RF), at least one harmonic rejection unit (HRU) with at least two transistor units (T, T; T, T) for multiplying an input signal from the input (RF) with a multiplication signal (ELO). The harmonic rejection mixer unit furthermore comprises a transistor control signal generating unit (GGU) for generating transistor control signals (GS-GS) for the at least two transistor units (T, T; T, T) of the at least one harmonic rejection unit (HRU) by deriving the transistor control signals (GS-GS) from a local oscillator signal (LO). The transistor control signals (GS, GS) for the at least two transistor units (T, T; T, T) are generated with a duty cycle of <50% and are generated such that the shape of the multiplication signal ELO) is achieved by a constructive summation of the output signals from the transistor units (T, T; T, T). The transistor control signals (GS-GS) are generated such that only a summation of output signals from the transistor units with the same sign or with zero is performed.