The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2012

Filed:

Jun. 24, 2011
Applicants:

Lidia Warnes, Roseville, CA (US);

Teddy Lee, Roseville, CA (US);

Ricardo Ernesto Espinoza-ibarra, San Diego, CA (US);

Dennis Carr, Roseville, CA (US);

Michael Bozich Calhoun, Roseville, CA (US);

Inventors:

Lidia Warnes, Roseville, CA (US);

Teddy Lee, Roseville, CA (US);

Ricardo Ernesto Espinoza-Ibarra, San Diego, CA (US);

Dennis Carr, Roseville, CA (US);

Michael Bozich Calhoun, Roseville, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A translator circuit translates a memory access conforming to a native FB-DIMM (Fully Buffered Dual In-Line Memory Module) protocol to a memory access for addressing more than two ranks of parallel memory devices. The parallel memory devices are distributed among plural non-fully-buffered DIMMs (Dual In-Line Memory Modules).


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