The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2012
Filed:
Apr. 01, 2010
Chun-ming Huang, Hsinchu, TW;
Chin-long Wey, Hsinchu, TW;
Chien-ming Wu, Hsinchu, TW;
Chih-chyau Yang, Hsinchu, TW;
Shih-lun Chen, Hsinchu, TW;
Chi-shi Chen, Hsinchu, TW;
Chi-sheng Lin, Hsinchu, TW;
Chun-Ming Huang, Hsinchu, TW;
Chin-Long Wey, Hsinchu, TW;
Chien-Ming Wu, Hsinchu, TW;
Chih-Chyau Yang, Hsinchu, TW;
Shih-Lun Chen, Hsinchu, TW;
Chi-Shi Chen, Hsinchu, TW;
Chi-Sheng Lin, Hsinchu, TW;
Abstract
A three-dimensional SoC structure formed by stacking multiple chip modules is provided. The three-dimensional SoC structure includes at least two vertical SoC modules and at least one connector module, wherein each connector module electrically connects two vertical SoC modules. Each vertical SoC module is constructed by stacking at least two chip modules vertically. Each chip module includes a module circuit board and at least one preset element. A recess is formed in each module circuit board and provided with a first connecting interface for electrically connecting with the corresponding at least one preset element. The at least two vertical SoC modules are connected by the connector module to form a three-dimensional SoC structure with multiple functions. Besides, the recesses formed in the module circuit boards provide effective heat dissipation paths for the preset elements.