The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2012
Filed:
Aug. 25, 2005
Integrated circuit arrangement including vias having two sections, and method for producing the same
Applicants:
Klaus Goller, Regensburg, DE;
Jakob Kriz, Weinboehla, DE;
Inventors:
Klaus Goller, Regensburg, DE;
Jakob Kriz, Weinboehla, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract
An integrated circuit arrangement containing a via is disclosed. The via has an upper section having greatly inclined sidewalls. A lower section of the via has approximately vertical sidewalls. In one embodiment, a liner layer is used as a hard mask in the production of the via and defines the position of the sections of the via.