The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2012
Filed:
Dec. 19, 2006
Douglas M. Freimuth, New York, NY (US);
Renato J. Recio, Austin, TX (US);
Claudia A. Salzberg, Austin, TX (US);
Steven M. Thurber, Austin, TX (US);
Jacobo A. Vargas, Cedar Park, TX (US);
Douglas M. Freimuth, New York, NY (US);
Renato J. Recio, Austin, TX (US);
Claudia A. Salzberg, Austin, TX (US);
Steven M. Thurber, Austin, TX (US);
Jacobo A. Vargas, Cedar Park, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A mechanism for initializing shared memories for sharing endpoints across a plurality of root complexes is provided. A multi-root PCIe manager (MR-PCIM) initializes the shared memory between root complexes and endpoints by discovering the PCIe switch fabric by traversing all the links accessible through the interconnected switches of the PCIe switch fabric. As the links are traversed, the MR-PCIM compares information obtained for each of the root complexes and endpoints to determine which endpoints and root complexes reside on the same blade. A virtual PCIe tree data structure is then generated that ties the endpoints available on the PCIe switch fabric to each root complex. The MR-PCIM, or a single-root PCIe manager (SR-PCIM), may then assign each endpoint and root complex a base and limit within the PCIe memory address space the endpoint belongs to.