The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2012

Filed:

Jun. 28, 2010
Applicants:

Koichi Toba, Tokyo, JP;

Yasushi Ishii, Tokyo, JP;

Yoshiyuki Kawashima, Tokyo, JP;

Satoru Machida, Tokyo, JP;

Munekatsu Nakagawa, Tokyo, JP;

Takashi Hashimoto, Tokyo, JP;

Inventors:

Koichi Toba, Tokyo, JP;

Yasushi Ishii, Tokyo, JP;

Yoshiyuki Kawashima, Tokyo, JP;

Satoru Machida, Tokyo, JP;

Munekatsu Nakagawa, Tokyo, JP;

Takashi Hashimoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a semiconductor device having, over a semiconductor substrate, a control gate electrode and a memory gate electrode which are adjacent to each other and constitute a nonvolatile memory. The height of the memory gate electrode is lower than the height of the control gate electrode. A metal silicide film is formed over the upper surface of the control gate electrode, but not formed over the upper surface of the memory gate electrode. The memory gate electrode has, over the upper surface thereof, a sidewall insulating film made of silicon oxide. This sidewall insulating film is formed in the same step as that for the formation of respective sidewall insulating films over the sidewalls of the memory gate electrode and the control gate electrode. The present invention makes it possible to improve the production yield and performance of the semiconductor device having a nonvolatile memory.


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