The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2012

Filed:

Jan. 09, 2008
Applicants:

Masaki Nagaoka, Kumagaya, JP;

Akihiko Kudo, Hitachinaka, JP;

Mutsumi Kikuchi, Mito, JP;

Kenichiro Tsuru, Hitachinaka, JP;

Tatsumi Yamauchi, Hitachioota, JP;

Akihiko Emori, Hitachi, JP;

Inventors:

Masaki Nagaoka, Kumagaya, JP;

Akihiko Kudo, Hitachinaka, JP;

Mutsumi Kikuchi, Mito, JP;

Kenichiro Tsuru, Hitachinaka, JP;

Tatsumi Yamauchi, Hitachioota, JP;

Akihiko Emori, Hitachi, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A cell controller with excellent reliability in which noise and soon are suppressed is provided. The cell controller includes, corresponding to the number of cell packs, a plurality of ICs each having a voltage detecting circuit detecting voltages of respective cells of a cell pack in which four cells are connected in series, a switch control circuit controlling conduction and a blocking operation of a plurality of switch elements connected in parallel to the respective cells via capacity adjusting resistors, a LIN1 terminal for inputting control information, a LIN2 terminal for outputting control information, a Vcc terminal and a GND terminal, and a LIN2 terminal of a higher-order IC and a LIN1 terminal of a lower-order IC are connected in a daisy chain. The Vcc terminal of each IC is connected to a positive electrode of a higher-order cell among cells constituting a corresponding cell pack via an inductor L for eliminating noise, and the GND terminal is coupled directly to the Vcc terminal of the lower-order IC. Noise is not superposed on the LIN1, LIN2 terminals.


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