Frequency synthesizer and frequency synthesizing method

Abstract

A frequency synthesizer for providing clock signals with different frequencies for corresponding band transceivers and associated frequency synthesizing method are provided. The frequency synthesizer includes a phase-locked loop module having a single voltage controlled oscillator, a first frequency divider and a second frequency divider. At first, the single voltage controlled oscillator is activated to generate a primary clock signal. The first frequency divider frequency-divides the primary clock signal to generate a first clock signal for a first band transceiver. The first clock signal is further frequency-divided into a second clock signal for a second band transceiver. Therefore, the frequency synthesizer with the single voltage controlled oscillator can generate clock signals covering more than one frequency band.